Custom Read Enable Circuits
- Published: Wednesday, 28 February 2018 13:01
- Written by Timothy Chapman
A read enable circuit (also known as an output enable circuit) is a circuit that allows a register (or other device) to output to a wire when active and blocks output when inactive. These circuits use controlled buffers (also known as tri-state buffers) to prevent conflicts between two or more components. When disabled, the output of these buffers is said to be "high-Z" or "high impedance." It's this high impedance part that allows multiple devices to output to the same wire. Below is an example of a 4-bit read enable circuit.
Now you could use a multiplexer to achieve the same goal, but that's only useful if all of the devices that output to the same line are in the same place. If they're scattered all over the place, then the wires going from each device to the multiplexer would be quite long. So tri-state buffers on each device are used instead, with a single wire going to each device as the read enable input. Here's an example of the proper use of these buffers.
The devices in the image above labeled clockwise from A to D starting at the top left corner. Below the four read enable circuits is a 2-to-4 decoder with an enable wire. The decoder ensures that only one device can ever output to the data bus at a time. Each device is given a unique address (in this case, a 2-bit address), and the address goes into the decoder's S input.